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cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 1/15 tl432a3/n3/m3/k3 cystek product specification adjustable shunt regulator tl432a3/n3/m3/k3 description features thetl432 is a three terminal adjustable shunt low voltage operation(down to 1.24v) regulator with thermal stability guaranteed over fast turn on response temperature. the output voltage can be adjusted low dynamic output impedance 0.2 typ. to any value from 1.24v(v ref ) to 18v with two trimmed bandgap design : 0.5% external resistors. the tl432 has a typical dynamic sink current capability : 100ma output impedance of 0.2 . active output circuitry available in to-92, sot-23, sot-89, and provides a very sharp turn on characteristic, making to-92l packages the tl432 an excellent replacement for zener diodes. applications the tl432 shunt regulator is available with two linear regulators voltage tolerances(0.5%, and 1% ), and four package adjustable supplies options(to-92, sot-23, sot-89 and to-92l). switching power supplies this allows the designer the opportu nity to select the battery operated computers optimum combination of cost and performance for instrumentation their application. computer disk drives typical application circuit (note 1,2) tl432 notes: 1) set v out according to the following equation: v out =v ref (1+r1/r2)+i ref r1 2) choose the value for r as follows: Bthe maximum limit for r should be such that the cathode current, iz, is greater than the minimum operating current(80a) at vi n(min) . Bthe minimum limit for r s hould be as such that iz does not exceed 100ma unde r all load conditions, and the instantaneous turn-on value for iz does not exceed 150ma. both of t he following conditions must be met: rmin v in(max) /150ma(to limit instantaneous turn-on iz) rmin v in(max) -v out (to limit iz under i out(min) +100ma normal operating conditions)
cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 2/15 tl432a3/n3/m3/k3 cystek product specification absolute maximum ratings parameter symbol maximum units cathode voltage vz 18 v continuous cathode current i z 100 ma reference input current i ref 3 ma power dissipation at t a =25 sot-23 sot-89 to-92 to-92l p d 0.18 0.4 0.5 0.72 w thermal resistance sot-23 sot-89 to-92 to-92l ja 556 250 200 139 /w operating ambient temperature range t a -40 to +85 operating junction temperature range t j -40 to +125 storage temperature range tstg -65 to +150 electrical characteristics unless otherwise specified, ta=25 . values in bold apply over full op erating ambient temperature range. tl432 a-rank( 0.5%) tl432 b-rank( 1%) parameter symbol condition min typ max min typ max unit reference voltage v ref v z =v ref ,i z =10ma(note 1) 1.234 1.240 1.246 1.228 1.240 1.252 v v ref temperature deviation v dev v z =v ref ,i z =10ma,t a =-40~ 105 c(note 1) - 10 20 - 10 20 mv ratio of change in v ref to change in v z v ref v z i z =10ma, v z =18v to v ref - -1 -2.0 - -1 -2.0 mv/v reference input current i ref r1=10k ,r2= , i z =10ma(note2) - 0.25 0.5 - 0.25 0.5 a i ref temperature deviation i ref(dev) r1=10k ,r2= , i z =10ma(note 2) - 0.05 0.3 - 0.05 0.3 a off-state cathode current i z(off) v ref =0v,v z =18v(note 3) - 0.04 0.5 - 0.04 0.5 a dynamic output impedance r z f <1khz,v z =v ref i z =1ma to 100ma(note 1) - 0.2 0.4 - 0.2 0.4 minimum operating current i z(min) v z =v ref (note 1) - 60 80 - 60 80 a notes: (1) see test circuit 1. (2) see test circuit 2. (3) see test circuit 3.
cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 3/15 tl432a3/n3/m3/k3 cystek product specification test circuits
cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 4/15 tl432a3/n3/m3/k3 cystek product specification block diagram symbol ref anode cathode vref anode ref cat h o d e ordering information device package rank tolerance shipping tl432a3-a-tb-g a 0.5% tl432a3-b-tb-g b 1% 2000 pcs / tape & box tl432a3-a-bk-g a 0.5% tl432a3-b-bk-g to-92 (pb-free lead plating and halogen-free package) b 1% 1000 pcs/ bag, 10 bags/box, 10boxes/carton tl432k3-a-tb-g a 0.5% tl432k3-b-tb-g b 1% 2000 pcs / tape & box tl432k3-a-bk-g a 0.5% tl432k3-b-bk-g to-92l (pb-free lead plating and halogen-free package) b 1% 500 pcs/ bag, 10 bags/box, 10boxes/carton TL432N3-A-T1-G a 0.5% tl432n3-b-t1-g sot-23 (pb-free lead plating and halogen-free package) b 1% 3000 pcs / tape & reel tl432m3-a-t1-g a 0.5% tl432m3-b-t1-g sot-89 (pb-free lead plating and halogen-free package) b 1% 1000 pcs / tape & reel
cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 5/15 tl432a3/n3/m3/k3 cystek product specification typical characteristics cathode current vs cathode voltage -300 -200 -100 0 100 200 300 -1 -0.5 0 0.5 1 1.5 cathode voltage ---vz(v) cathode current---iz(a ) vz=v ref ta=25 cathode current vs cathode voltage -150 -100 -50 0 50 100 150 -1.5 -1 -0.5 0 0.5 1 1.5 cathode voltage---vz(v) cathode current---iz(ma ) vz=vref ta=25 reference voltage vs junction temperature 1.234 1.236 1.238 1.24 1.242 1.244 1.246 1.248 -50 0 50 100 150 junction temperature---tj() reference voltage---vref(v) iz=60a iz=10ma reference input current vs junction temperature 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150 junction temperature---tj() reference input current---iref(na ) iz=10ma r1=10k r2= ratio of delta reference voltage to delta cathode voltage vs junction temperature 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 -50 -25 0 25 50 75 100 125 150 junction temperature---tj() vref/vz---(-mv/v ) iz=10ma vz=16v to vref off-state cathode current vs junction temperature 0 50 100 150 200 250 -50 -25 0 25 50 75 100 125 150 junction temperature---tj() off-state cathode current---iz (off)(na) v ref =0v vz=16v vz=6v
cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 6/15 tl432a3/n3/m3/k3 cystek product specification typical characteristics (cont.) reference impedance vs junction temperature 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 -50 -25 0 25 50 75 100 125 150 junction temperature---tj() reference impedance---rz() iz=0.1 to 100ma vz=v ref f<1khz reference impedance vs frequency 0.1 1 10 100 1000 10000 100000 1000000 frequency---f(hz) reference impedance---rz() t a =25 small-signal gain vs frequency -20 -10 0 10 20 30 40 50 60 70 100 1000 10000 100000 1000000 frequency---f(hz) small-signal gain---av(db) small-signal phase shift vs frequency -360 -315 -270 -225 -180 100 1000 10000 100000 1000000 frequency---f(hz) small-signal phase shift---(deg) stability boundary condition for shunt regulation vs cathode current and load capacitance 0 0.5 1 1.5 2 2.5 3 3.5 0.001 0.01 0.1 1 10 load capacitance---cl(f) cathode current---iz(ma ) t a =25 stable stable vz=v ref vz=2v power derating curves 0 0.2 0.4 0.6 0.8 0 25 50 75 100 125 150 junction temperature---tj() power dissipation---pd(w) to-92 sot-89 sot-23 to-92l
cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 7/15 tl432a3/n3/m3/k3 cystek product specification test circuit-small-signal gain and phase test circuit-stability + 15k 8.25k p l432 232 iz ou t gnd 10 f tl432 iz r1 r2 pl432 r c l tl432 applications information - stability selection of load capacitance when using tl432 as a shunt regulator when the tl432 is used as a shunt regul ator, two options for selection of c l (see diagram on page 6) are recommended for optimal stability: 1) no load capacitance across the device, decouple at the load. 2) large capacitance across the device, optimal decoupling at the load. the reason for this is that tl432 exhibits instabil ity with capacitances in the range of 10nf to 1 f (approx.) at light cathode cu rrents(up to 3ma typical). the device is less stable th e lower the cathode voltage has been set for. therefore while the device will be perfectly stable operating at a cathode current of (say) 10ma with a 0.1 f capacitor across it, it will oscillat e transiently during start-up as the cathode current passes through the inst ability region. selecting a very low (or preferably, no) capaci- tance, or alternatively a high capacitance(such as 10 f) will avoid this issue altogether. since the user will probably wish to have local decoupling at the load anyway, the most cost effective method is to use no capacitance at all directly ac ross the device. pcb trace/via resi stance and inductance prevent the local load decoupling from causing the osci llation during the tran sient start-up phase. note : if the tl432 is located right at the load, so the load decoupling capacitor is directly across it, then this capacitor will have to be 1nf or 10 f.
cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 8/15 tl432a3/n3/m3/k3 cystek product specification to-92 taping outline millimeters dim item min. max. a component body height 4.33 4.83 d tape feed diameter 3.80 4.20 d1 lead diameter 0.36 0.53 d2 component body diameter 4.33 4.83 f1,f2 component lead pitch 2.40 2.90 f1,f2 f1-f2 - 0.3 h height of seating plane 15.50 16.50 h1 feed hole location 8.50 9.50 h2 front to rear deflection - 1 h2a deflection left or right - 1 h3 component height - 27 h4 feed hole to bottom of component - 21 l lead length after component removal - 11 l1 lead wire enclosure 2.50 - p feed hole pitch 12.50 12.90 p1 center of seating plane location 5.95 6.75 p2 4 feed hole pitch 50.30 51.30 t over all tape thickness - 0.55 t1 total taped package thickness - 1.42 t2 carrier tape thickness 0.36 0.68 w tape width 17.50 19.00 w1 adhesive tape width 5.00 7.00 - 20 pcs pitch 253 255 h2a h2a h2 h2 d2 a h w w1 h3 h4 h1 l1 l p2 p p1 f1 f2 d1 d t2 t t1
cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 9/15 tl432a3/n3/m3/k3 cystek product specification sot-23 reel dimension sot-23 carrier tape dimension
cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 10/15 tl432a3/n3/m3/k3 cystek product specification sot-89 reel dimension sot-89 carrier tape dimension
cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 11/15 tl432a3/n3/m3/k3 cystek product specification to-92l taping outline millimeters dim item min. max. a1 component body width 4.70 5.10 a component body height 7.80 8.20 t component body thickness 3.70 4.10 d lead wire diameter 0.40 0.50 d1 lead wire diameter 1 0.62 0.78 p pitch of component 12.40 13.00 p0 feed hole pitch 12.50 12.90 p2 hole center to component center 6.05 6.65 f1, f2 lead to lead distance 2.20 2.80 h component alignment, f-r -1.00 1.00 w tape width 17.50 19.00 w0 hole down tape width 5.50 6.50 w1 hole position 8.50 9.50 w2 hole down tape position - 1.00 h height of component fr om tape center 19.00 21.00 h0 lead wire clinch height 15.50 16.50 l1 lead wire (tape portion) 2.50 - d0 feed hole diameter 3.80 4.20 t1 taped lead thickness 0.35 0.45 t2 carrier tape thickness 0.15 0.25 p1 position of hole 3.55 4.15 p component alignment -1.00 1.00
cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 12/15 tl432a3/n3/m3/k3 cystek product specification to-92 dimension 31 a d b c i 1 e f 2 3 g h 2 marking: tl 432 date code 3-lead to-92 plastic package cystek packa g e code: a 3 style: pin 1.reference 2.anode 3.cathode *: typical inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.1704 0.1902 4.33 4.83 g 0.0142 0.0220 0.36 0.56 b 0.1704 0.1902 4.33 4.83 h - * 0.1000 - * 2.54 c 0.5000 - 12.70 - i - * 0.0500 - * 1.27 d 0.0142 0.0220 0.36 0.56 1 - * 5 - * 5 - * 0.0500 - * 1.27 2 - * 2 - * 2 e f 0.1323 0.1480 3.36 3.76 3 - * 2 - * 2 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0.
cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 13/15 tl432a3/n3/m3/k3 cystek product specification sot-23 dimension *: typical inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. marking: 432 style: pin 1.reference 2.cathode 3.anode 3-lead sot-23 plastic surface mounted package cystek package code: n3 a 0.1102 0.1204 2.80 3.04 j 0.0032 0.0079 0.08 0.20 b 0.0472 0.0669 1.20 1.70 k 0. 0118 0.0266 0.30 0.67 c 0.0335 0.0512 0.89 1.30 l 0.0335 0.0453 0.85 1.15 d 0.0118 0.0197 0.30 0.50 s 0.0830 0.1161 2.10 2.95 g 0.0669 0.0910 1.70 2.30 v 0.0098 0.0256 0.25 0.65 h 0.0000 0.0040 0.00 0.10 l1 0. 0118 0.0197 0.30 0.50 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please contact your local cyctek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0.
cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 14/15 tl432a3/n3/m3/k3 cystek product specification sot-89 dimension *: typical inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.1732 0.1811 4.40 4.60 f 0.0583 0.0598 1.48 1.527 b 0.1594 0.1673 4.05 4.25 g 0. 1165 0.1197 2.96 3.04 c 0.0591 0.0663 1.50 1.70 h 0.0551 0.0630 1.40 1.60 d 0.0945 0.1024 2.40 2.60 i 0.0138 0.0161 0.35 0.41 e 0.01417 0.0201 0.36 0.51 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. marking: month code: 1~9, a,b,c e f g c b a 3 2 1 style: pin 1. reference 2. anode 3. cathode product name year code: 02010, 1 2011, 22012, ?etc. h i d 3-lead sot-89 plastic surface mounted package cystek package code: m3
cystech electronics corp. spec. no. : c504a3 issued date : 2003.03.21 revised date : 2013.10.23 page no. : 15/15 tl432a3/n3/m3/k3 cystek product specification to-92l dimension s t yle: pin 1. refe ren c e 2. anode 3. cathod e 3-l ead t o -9 2l plasti c pa ckage cys t ek pa ck a g e code: k3 product name tl 432 y ear: 7 2007, 8 20 08 month: 1 1, 2 2, ??? , 9 9, a 10, b 11 , c 12 date code: y ear+month marking: *: t y pical i n c h e s m i l l i m e t e r s i n c h e s m i l l i m e t e r s dim m i n . m a x . m i n . m a x . dim m i n . m a x . m i n . m a x . a 0 . 1 4 6 0 . 1 6 1 3 . 7 0 0 4 . 1 0 0 e 0 . 3 0 7 0 . 3 2 3 7 . 8 0 0 8 . 2 0 0 a 1 0 . 0 5 0 0 . 0 6 2 1 . 2 8 0 1 . 5 8 0 e * 0 . 0 5 * 1 . 2 7 0 b 0 . 0 1 4 0 . 0 2 2 0 . 3 5 0 0 . 5 5 0 e 1 0 . 0 9 6 0 . 1 0 4 2 . 4 4 0 2 . 6 4 0 b 1 0 . 0 2 4 0 . 0 3 1 0 . 6 0 0 0 . 8 0 0 l 0 . 5 4 3 0 . 5 5 9 1 3 . 8 0 0 1 4 . 2 0 0 c 0 . 0 1 4 0 . 0 1 8 0 . 3 5 0 0 . 4 5 0 ? - 0 . 0 6 3 - 1 . 6 0 0 d 0 . 1 8 5 0 . 2 0 1 4 . 7 0 0 5 . 1 0 0 h 0 . 0 0 0 0 . 0 1 2 0 . 0 0 0 0 . 3 0 0 d 1 0 . 1 5 7 - 4 . 0 0 0 - note s: 1.controlling dimension: millimeter s. 2.maximum lead thickness include s lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is an y q uestion w i th p a ck ing specification or p a cking metho d , please c ont act y our local c y s t ek sales of fice. material: ? lead: pur e tin plated. ? mold compou n d : epoxy resin fa mily , flammabilit y solid burning cla ss: ul94v -0. im portan t n o tice : ? all rights are re served. reprod u c tion in w hole or in part is prohibited w i thout the p r ior w r itten a pprov al of c y stek. ? c y stek reserv es the right to m a ke changes to its products w i tho u t notice. ? cy st e k semic ond uct o r pr odu cts are n o t warr ante d t o be s u it able f o r use i n l i fe-su p p o rt a p p licatio ns, or sys tems. ? c y stek assumes no liability fo r an y consequenc e of customer pr oduct design, infringement of pat e n ts, or application assistance .

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